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The RAM organization dictionary, but at a data recording each cell of memory consists of the elements of memory entering the corresponding column of a matrix, and when reading - of the elements entering the corresponding line. The scheme of this device consists from:

For implementation of switching it is necessary to create the general, condensed in time channel, and to rearrange impulses from one temporary position in another. Technically it is easy to execute such shift in a memory if to write down information of the general channel consistently, and to read out according to the card of switching.

The principle of work of this scheme consists in the following, at record from the address counter the three-digit code arrives on the decoder of columns, and the decoder of lines is switched-off and eight categories of one information channel arrive on elements of memory of the chosen column. When reading the decoder of columns is switched-off, and the three-digit code of the counter of addresses arrives on the decoder of lines and eight categories of different information channels of the same name of the chosen line of a matrix arrive on the corresponding eight exits of the proceeding group channels. As a result at the exit of the switching group channels in the IKM-30/3 standard are ENCORE formed

The principle of cyclic alignment consists in record in a memory of information of the entering group channels synchronously with the allocated clock impulses and their reading synchronously with station impulses of clock and cyclic synchronization.

The memory of the address is intended for storage of the address of the entering channel which information arrives on an exit at the time of receipt of the station clock impulse corresponding to number of the proceeding channel.

When reading the memory of switching represents the RAM with the dictionary organization. Each cell of the RAM contains information of one information channel. Therefore, all eight categories of each of information channels can be read out at the same time on the parallel channel. Thus, along with consolidation switching is carried out. In this mode the multiplexer connects an address memory to the decoder of columns, and the decoder of lines thus is switched-off, and the RAM gets the dictionary organization, each of eight elements of memory which are a part of columns of a matrix of memory form one cell of memory and are read out in parallel.

The block of formation of the proceeding group channels, is intended for formation of 8 channels of the IKM standard - 30/32 of arriving on its entrance condensed in time and the commutated channel carried in space. For ensuring continuous formation of channels the block needs two memories, to each timepoint from one there is a reading, and to another there is a record. At the time of record on the parallel tire eight categories of one of channels are transferred, therefore, the RAM has to contain eight elements in a column. At the time of reading eight proceeding group channels are formed, eight bits, on one on each canal come to each timepoint on an exit; therefore, the RAM has to contain eight columns. Thus, the general capacity of the RAM makes 64 bits.

The generator of pulse sequence develops a certain set of the pulse sequences used for management of work of functional knots of the switchboard, their synchronization. The function chart of the generator contains three distributors of impulses: the distributor of digit impulses, the distributor of channel impulses and the distributor of cyclic impulses, each of which contains the binary counter and the decoder.